This invention relates generally to testing electronic devices and, more specifically, to a device for testing semiconductor devices.
Once an electronic device is manufactured, the electronic device is generally tested to ensure that it is working properly. FIG. 1 illustrates a conventional assembly used to test the performance of an electronic device 120 such as an integrated circuit chip. Assembly 100 includes handler 110, test contactor 130, loadboard 160, and tester 170. Tester 170 supports loadboard 160 and test contactor 130 in order to test electronic device 120. Loadboard 160 serves to electrically couple plurality of pins 150 to tester 170. Handler 110 carries electronic device 120 from an area such as a final test location in a manufacturing area (not shown) and holds electronic device 120 in place while set of contact points 125, such as an array of solder balls at the bottom surface of electronic device 120 contact a corresponding plurality of pins 150 that protrude from test contactor 130.
Plurality of pins 150 includes a set of power pins, a set of ground pins, and a set of signal pins. Signal pins typically carry digital I/O signals such as address bits, control bits, and/or data bits. Power pins provide voltage from a power source (not shown) to set of contact points 125 for testing the performance of electronic device 120. Ground pins generally have ground zero potential to carry the current to ground and prevent the voltage in the power pins from overheating test contactor 130. To prevent a short circuit, power pins are typically isolated from ground pins.
FIG. 2 illustrates a schematic top view of test contactor 130 on loadboard 160. Test contactor 130 includes test contactor housing 210 that surrounds plurality of pins 150. In testing, for example, set of contact points 125 of device 120 by plurality of pins 150, pins may be addressed individually at fast transient times. The nature of the quick addressing of plurality of pins 150 (e.g., power pins coupled to power rails) causes voltage noise that is generally attributable to variations in the power source (not shown). Outside of test contactor housing 210 a plurality of capacitor pads 280 that include a plurality of capacitors (e.g., fifty capacitors) are placed on loadboard 160 for minimizing variations in the external power source.
FIG. 3 illustrates a cross-sectional view of a portion of the assembly of FIG. 1 including a magnified portion of test contactor 130. Test contactor 130 includes test contactor housing 210 that supports elements of test contactor 130, namely plurality of pins 150. Test contactor housing 210 includes a bottom plate typically made of a polymeric or plastic material such as VESPEL(copyright) commercially available from E. I. Dupont de Nemours of Wilmington, Delaware. The combination of test contactor 130 and loadboard 160 may be referred to as test interface unit 270 that interfaces with set of contact points 125 of electronic device 120.
Test contactors have generally been unable to adequately resolve several problems associated with testing of the performance of electronic devices. Test contactors typically have high frequency noise and voltage drops in power delivery systems due, in part, to fast switching transients (e.g., pin to pin) and the current consumption associated with electronic device testing. To address the noise considerations, capacitors are added to loadboards. Unfortunately, there is a very limited and a relatively ineffective decoupling area on test loadboards for a comprehensive test tooling decoupling solution (e.g., suitable capacitance to reduce noise). Yet another problem relates to dissipation of the heat generated from plurality of pins 150.
In order to reduce the effects from these problems, modifications have been made to test contactors that affect the cost and quality of test contactors. First, the length of each pin of plurality of pins 150 in test contactor 130 has been reduced from, for example, 7.8 millimeters (mm) or greater to about 3.5 mm. However, by reducing the length of each pin, plurality of pins 150 tend to be less reliable and the cost of test contactor 130 is increased.
Second, conventional test systems use a large quantity of decoupling capacitors such as fifty capacitors on, for example, loadboards. These loadboards are generally already fully populated with pin contacts. The larger number of decoupling capacitors increases the cost of the conventional test systems.
Third, conventional test systems increase the time period in which to test the performance of an electronic device such as an integrated circuit due to factors such as excessive noise. By increasing this time period, the time to produce a functional integrated circuit is also increased. This in turn affects the overall cost of producing integrated circuits. It is therefore desirable to have an apparatus and a method for addressing these disadvantages in the art.